Biographical Sketch of Prof. Sheldon X.-D. Tan

 

Dr. Sheldon Tan is a Full Professor in the Department of Electrical Engineering, University of California at Riverside. He is the Associate Director of Compute Engineering Program (CEN) at Bourn College of Engineering at UC Riverside since 2009. He also is a cooperative faculty member in the Department of Computer Science and Engineering at UCR. He received his B.S. and M.S. degrees in electrical engineering from Fudan University, Shanghai, China in 1992 and 1995, respectively and the Ph.D. degree in electrical and computer engineering from the University of Iowa, Iowa City, in 1999.

 

He was a faculty member in Department of Electrical Engineering, Fudan University from 1995 to 1996.  He worked for Monterey Design Systems Inc. (now Synopysis), CA, from 1999 to 2001 and Altera Corporation CA, from 2001 to 2002.  Since 2002,  he has been with the Department of Electrical Engineering, University of California at Riverside, CA. Prof. Tan is a Visiting Professor of Fudan University and Tsinghua University, China and a Guest Professor of  Shanghai Jiaotong University and University of Electronic Science and Technology of China, China.

 

Dr. Tan research interests include several aspects of design automation for VLSI integrated circuits – (1) statistical modeling, simulation and optimization of mixed-signal/RF/analog circuits; (2) fast thermal analysis, modeling and dynamic thermal management for microprocessors and platform systems; (3) parallel circuit simulation techniques based on GPU and multicore systems; (4) embedded system designs based on FPGA platforms.  He has published over 200 journal and conference papers and gave over 70 invited presentations,  tutorials and short courses at conferences and workshops. He also co-authored 3 books --  "Symbolic Analysis and Reduction of VLSI Circuits" by Springer/Kluwer 2005 and  "Advanced Model Order Reduction Techniques for VLSI Designs” by Cambridge University Press 2007 and Statistical Performance Analysis and Modeling Techniques for Nanometer VLSI Designs”, Springer 2012.

 

He received Outstanding Oversea Investigator Award (杰青-Bfrom the National Natural Science Foundation of China (NSFC) in 2008. Dr. Tan received NSF CAREER Award in 2004.  Dr. Tan received the Best Paper Award from 2007 IEEE International Conference on Computer Design (ICCD’07), ), two Best Paper Award Nomination from 2005 and 2009 IEEE/ACM Design Automation Conferences, the Best Paper Award from 1999 IEEE/ACM Design Automation Conference and the Best Poster Award from 1999 Spring Meeting of the NSF Center for Design of Analog and Digital Integrated Circuits (CDADIC).   He received the UC Regent’s Faculty Fellowship in 2004 and 2006 and Academic Senate COR (committee on Research) Fellowship from UCR in 2008 and 2013. One of his papers was one of Top 10 of Downloaded Articles in  ACM Transaction on Design Automation of Electronic Systems (TODAES) in 2010. He also received the Best Graduate Award and a number of Excellent College Student Scholarships from Fudan University.  He also co-authored book Symbolic Analysis and Reduction of VLSI Circuits by Springer/Kluwer 2005 and Advanced Model Order Reduction Techniques for VLSI Designs, by Cambridge University Press 2007. 

 

Dr. Tan now is serving as an Associate Editor for three journals: ACM Transaction on Design Automation of Electronic Systems (TODAE),  Integration, The VLSI Journal, and Journal of VLSI Design. He is a technical program committee member of DAC, ICCAD, ASPDAC,  ICCD, BMAS,  ISQED, ASICON.  Dr. Tan is a senior member of IEEE. He holds one patent, two provisional patents in United States and 5 patents in China.

 

 

IEEE style Biographical Sketch of Prof. Sheldon X.-D. Tan

 

{Sheldon X.-D. Tan} (S’96-M’99-SM’06) received his B.S. and M.S. degrees in electrical engineering from Fudan University, Shanghai, China in 1992 and 1995, respectively and the Ph.D. degree in electrical and computer engineering from the University of Iowa, Iowa City, in 1999.  He is a Professor in the Department of Electrical Engineering, University of California, Riverside, CA.  He is the Associate Director of Compute Engineering Program (CEN) at Bourn College of Engineering at UC Riverside since 2009. He also is a cooperative faculty member in the Department of Computer Science and Engineering at UCR.

 

His research interests include statistical modeling, simulation and optimization of mixed-signal/RF/analog circuits, fast thermal analysis, modeling and dynamic thermal management for microprocessors and platform systems, parallel circuit simulation techniques based on GPU and multicore systems, and embedded system designs based on FPGA platforms.  He also co-authored book "Symbolic Analysis and Reduction of VLSI Circuits" by Springer/Kluwer 2005 and  "Advanced Model Order Reduction Techniques for VLSI Designs” by Cambridge University Press 2007 and “Statistical Performance Analysis and Modeling Techniques for Nanometer VLSI Designs”, Springer 2012. Dr. Tan now is serving as an Associate Editor for three journals: ACM Transaction on Design Automation of Electronic Systems (TODAE), Integration, The VLSI Journal, and Journal of VLSI Design.

 

Dr. Tan received Outstanding Oversea Investigator Award from the National Natural Science Foundation of China (NSFC) in 2008. He received NSF CAREER Award in 2004. Dr. Tan received the Best Paper Award from 2007 IEEE International Conference on Computer Design (ICCD'07), two Best Paper Award Nomination from 2005 and 2009 IEEE/ACM Design Automation Conferences, the Best Paper Award from 1999 IEEE/ACM Design Automation Conference. He served as a technical program committee member for DAC, ICCAD, ASPDAC, ICCD, ISQED, BMAS, ASICON.