Biographical Sketch of Prof. Sheldon X.-D. Tan

 

Dr. Sheldon Tan is an Associate Professor in the Department of Electrical Engineering, University of California at Riverside. He received his B.S. and M.S. degrees in electrical engineering from Fudan University, Shanghai, China in 1992 and 1995, respectively and the Ph.D. degree in electrical and computer engineering from the University of Iowa, Iowa City, in 1999.

 

He was a faculty member in Department of Electrical Engineering, Fudan University from 1995 to 1996.  He worked for Monterey Design Systems Inc. (now Synopysis), CA, from 1999 to 2001 and Altera Corporation CA, from 2001 to 2002. Now he is with the Department of Electrical Engineering, University of California at Riverside as an Associate Professor.  He also is a cooperative faculty member in the Department of Computer Science and Engineering at UCR. Prof. Tan is a Guest Professor of Fudan University, Shanghai, China.

 

Dr. Tan research interests include several aspects of design automation for VLSI integrated circuits – modeling and simulation of analog/RF/mixed-signal VLSI circuits, high performance power and clock distribution network simulation and design, signal integrity, power modeling, thermal modeling, thermal optimization in VLSI physical and architecture levels and embedded system designs based on FPGA platforms. He has published over 110 journal and conference papers and gave over 30 invited presentations and tutorials at conferences and workshops. He serves as an Associate Editor for Journal of VLSI.

 

Dr. Tan is the recipient of NSF CAREER Award in 2004.  He also received the UC Regent’s Faculty Fellowship in 2004 and 2006. Dr. Tan received the Best Paper Award from 2007 IEEE International Conference on Computer Design (ICCD’07), a Best Paper Award Nomination from 2005 IEEE/ACM Design Automation Conference, the Best Paper Award from 1999 IEEE/ACM Design Automation Conference and the Best Poster Award from 1999 Spring Meeting of the NSF Center for Design of Analog and Digital Integrated Circuits (CDADIC).  He also received the Best Graduate Award and a number of Excellent College Student Scholarships from Fudan University.  He also co-authored book Symbolic Analysis and Reduction of VLSI Circuits by Springer/Kluwer 2005 and Advanced Model Order Reduction Techniques for VLSI Designs, by Cambridge University Press 2007.  He is a technical program committee member of ASPDAC'05,  BMAS’05, ASPDAC’06, ISQED’06, ICCAD’06, BMAS’06, ASPDAC’07, ASPDAC’08.  Dr. Tan is a senior member of IEEE. He holds one US and 5 China patents.