Areas of Interests: Distributed Embedded Systems,
Cyber-Physical Systems, Computer-Aided Design.
My recent projects have been focusing on system level optimization and
modeling methodologies for distributed embedded systems and cyber-physical
systems:
Extensibility optimization for distributed embedded systems
[J2, C7]
This work optimizes an extensibility metric that measures how much the
execution times of software tasks can be increased without violating
design constraints. Optimizing extensibility allows adding future
functionality or upgrading existing functionality without major redesign
cycle, which is imperative for large-volume and long lifetime systems
such as vehicles, airplanes and buildings. This work was in
collaboration with United Technologies.
Task allocation and priority assignment for distributed
embedded systems [J3, C6]
This work minimizes the end-to-end latencies along timing-critical paths
in distributed embedded systems, by exploring major design variables
such as the allocation and priority assignment of tasks and signals.
End-to-end latencies are crucial for system performance and safety. This
work was in collaboration with General Motors.
Period optimization for distributed embedded systems [C5]
This work also targets the reduction of end-to-end latencies in
distributed embedded systems, through exploring the activation periods
of tasks and messages. It was in collaboration with General Motors.
Design flow for building automation and control systems [C8]
To reduce energy consumption, modern green buildings employ complex
automation systems that closely monitor and control the building
environment (e.g. HVAC and lighting control). We proposed a design flow
to optimally and correctly implement the control mechanisms on a
distributed building platform, with consideration of physical elements
such as building layout, sensor/actuator locations and environment
dynamics. This work was in collaboration with United Technologies.
Metropolis and Metro II: Design frameworks for heterogeneous
embedded systems [C4]
I was part of the Metropolis
project conducted at UC Berkeley and Gigascale
Systems Research Center, which provides a system level framework
for modeling heterogeneous systems and performing various design
activities such as simulation, verification and synthesis.
In past, I also worked on CAD for circuits, including projects on logic
synthesis and physical design:
SAT sweeping with local observability don't cares [C3] Boolean reasoning is an essential part of electronic design
automation. AND-INVERTER Graphs (AIGs) are often used to represent
Boolean functions but have a high degree of structural redundancy. We
proposed a significant extension of the SAT-sweeping algorithm that
exploits local observability don't-cares (ODCs) to simplify AIGs. This
work was in collaboration with Cadence.
Non-rectilinear global routing [J1, C1]
We proposed global routing algorithms for octilinear interconnect
architecture, and extended them to general non-rectilinear interconnect.
I am also very interested in SOC design methodologies and tools. While in
Berkeley, I worked with Intel on a project of exploring different
implementations of JPEG encoder on Intel MXP5800 media processor ([C2]).
After joining the Strategic CAD Labs in Intel, I have been focusing on
system level modeling and exploration methodologies and tools for Intel
SOCs.
Complete list of publications is available in my CV.
Here are some selected papers.
[J3] Optimization of Task Allocation and Priority Assignment
in Hard Real-Time Distributed Systems
Qi Zhu, Haibo Zeng, Wei Zheng, Marco Di Natale and Alberto
Sangiovanni-Vincentelli accepted by the ACM Transactions on Embedded Computing Systems
(TECS), Special Issue on the Synthesis of Cyber-Physical Systems.
[J2] Optimizing the Software Architecture for Extensibility in
Hard Real-Time Distributed Systems
Qi Zhu, Yang Yang, Marco Di Natale, Eelco Scholte and Alberto
Sangiovanni-Vincentelli IEEE Transactions on Industrial Informatics (TII), Vol. 6, No. 4,
November 2010.
[J1] Spanning Graph-Based Nonrectilinear Steiner Tree
Algorithms
Qi Zhu, Hai Zhou, Tong Jing, Xianlong Hong and Yang Yang IEEE Transactions on Computer-Aided Design of Integrated Circuits
and Systems (TCAD), Vol. 24, No. 7, July 2005.
[C8] A Design Flow for Building Automation and Control Systems
Yang Yang, Alessandro Pinto, Alberto Sangiovanni-Vincentelli and Qi Zhu
31st IEEE Real-Time Systems Symposium (RTSS'10), San Diego, CA,
December 2010.
[C7] Optimizing Extensibility in Hard Real-time Distributed
Systems
Qi Zhu, Yang Yang, Eelco Scholte, Marco Di Natale and Alberto
Sangiovanni-Vincentelli 15th IEEE Real-Time and Embedded Technology and Applications
Symposium (RTAS'09), San Francisco, CA, April 2009.
[C6] Definition of Task Allocation and Priority Assignment in
Hard Real-Time Distributed Systems
Wei Zheng, Qi Zhu, Marco Di Natale and Alberto Sangiovanni-Vincentelli 28th IEEE Real-Time Systems Symposium (RTSS'07), Tucson, Arizona,
December 2007.
[C5] Period Optimization for Hard Real-time Distributed
Automotive Systems
Abhijit Davare, Qi Zhu, Marco Di Natale, Claudio Pinello, Sri Kanajan
and Alberto Sangiovanni-Vincentelli 44th IEEE/ACM Design Automation Conference (DAC'07), San Diego,
California, June 2007. (Best Paper Award)
[C4] A Next-Generation Design Framework for Platform-Based
Design
Abhijit Davare, Douglas Densmore, Trevor Meyerowitz, Alessandro Pinto,
Alberto Sangiovanni-Vincentelli, Guang Yang, Haibo Zeng and Qi Zhu Design and Verification Conference (DVCon'07), San Jose, CA,
February 2007.
[C3] SAT Sweeping with Local Observability Don't-Cares
Qi Zhu, Nathan Kitchen, Andreas Kuehlmann and Alberto
Sangiovanni-Vincentelli 43rd IEEE/ACM Design Automation Conference (DAC'06), San Francisco,
California, July 2006. (Best Paper Award)
[C2] JPEG Encoding on the Intel MXP5800: A Platform-Based
Design Case Study
Abhijit Davare, Qi Zhu, John Moondanos and Alberto
Sangiovanni-Vincentelli 3rd IEEE Workshop on Embedded Systems for Real-Time Multimedia
(ESTIMedia'05), New York Metro Area, September 2005.
[C1] Efficient Octilinear Steiner Tree Construction Based on
Spanning Graphs
Qi Zhu, Hai Zhou, Tong Jing, Xianlong Hong and Yang Yang 9th IEEE/ACM Asia and South Pacific Design Automation Conference
(ASP-DAC'04), Yokohama, Japan, January 2004.
I am looking for motivated students to work with me in the areas of
distributed embedded systems, energy-efficient cyber-physical systems, and
SOC software/hardware co-design. Please do not hesitate to contact me if you
are interested.
Last modified:
2012 / 2 / 11