University of California, Riverside

Department of Electrical and Computer Engineering



NSF supports Prof. Tan’s research for statistical analysis of nanometer analog and mixed-signal circuits


NSF supports Prof. Tan’s research for statistical analysis of nanometer analog....
 

Prof. Sheldon TanEE Professor Sheldon Tan (PI) received a new three –year grant from National Science Foundation for exploring new techniques for statistical analysis of nanometer analog and mixed-signal circuits. The NSF project is titled “SHF:Small:Variational and Bound Performance Analysis of Nanometer Mixed-Signal/Analog Circuits ” with 275K for three years (CCF-1116882). Dr. Tan is the single PI for this award.

Analog and mixed-signal circuits are very sensitive to the process variations as many matching and regularities of the layout are required. This situation becomes worse as technology continues to scale to sub-40nm owning to the increasing process-induced variability. Efficient variational performance analysis of mixed-signal/analog circuits such as worst-case, bounding case and statistical analysis will become imperative for nanometer analog/mixed-signal designs.

In this project, Prof. Tan’s team will investigate novel and efficient non-Monte-Carlo techniques for worst-case and statistical analysis of analog/mixed-signal circuits. First, the team will develop novel worst-case analysis methods for analog/mixed-signal circuits based on graph-based symbolic analysis technique, affine-like interval arithmetic and a control-theoretic method. The team will investigate the performance bounds in the time domains given frequency domain bounds. Second, Dr. Tan’s team plans to develop fast non-Monte-Carlo stochastic analysis methods to calculate statistical responses such as mismatch due to process variations. We model the problem as solving nonlinear stochastic differential-algebra-equations. Nonlinear stochastic methods and new nonlinear macromodeling method will be investigated to solve the resulting problems.

Prof. Tan’s team will work with the industry partner IBM Corporation to bring immediate impacts on the design community to improve the design productivity for nanometer VLSI systems.

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