University of California, Riverside

Department of Electrical and Computer Engineering



Dr. Sheldon Tan Receives UC Micro Awards


Dr. Sheldon Tan Receives UC Micro Awards
 
Professor Sheldon Tan has received two UC Micro awards co-funded by Cadence Design Systems Inc. and Intel Corporation for the academic year 2007-2008.
The first UC Micro project will focus on the advanced compact modeling and reduction techniques for interconnect circuits of nanometer VLSI systems with strongly magnetic couplings and high speed traveling signals. The new approaches will be applied to many global nanometer interconnects, including clock networks, substrate planes, and critical interconnects in the memory circuits such as word or bit lines. Those inductively coupled interconnect interconnects are typically modeled by partial element equivalent circuits (PEEC), which typically lead to very dense circuit matrices and are very difficult to simulate and reduce owing to the large computation costs.  
The second UC Micro project will investigate behavioral-language based multi-physics modeling techniques for multi-core high performance microprocessors. The new modeling techniques will facilitate the design and optimization of nanometer microprocessors and help mitigate the increasing power and thermal related problems in today’s 65nm and future 45nm microprocessor design and fabrication. 
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